ON Semiconductor NL17SZ74USG D Type Flip Flop IC, 1.65 → 5.5 V, 8-Pin US

Datasheets
Wetgeving en compliance
Conform
Productomschrijving

NL17SZ Series, ON Semiconductor

CMOS Logic gates with LVTTL compatible inputs and outputs, offering higher speed and greater drive capability than 74LCX devices

Wide 1.65 to 5.5V operating supply
24mA source/sink capacity at 3.0V
Over-voltage tolerant inputs

NL Series Logic Family, ON Semiconductor

Specificaties
Kenmerk Waarde
Logic Family LCX
Logic Function D Type
Output Signal Type Differential
Triggering Type Positive Edge
Polarity Inverting, Non-Inverting
Mounting Type Surface Mount
Package Type US
Pin Count 8
Number of Elements per Chip 1
Maximum Propagation Delay Time @ Maximum CL 14.5 ns@ 15 pF
Dimensions 2.1 x 2.4 x 0.8mm
Width 2.4mm
Minimum Operating Supply Voltage 1.65 V
Height 0.8mm
Maximum Operating Temperature +125 °C
Propagation Delay Test Condition 15pF
Length 2.1mm
Maximum Operating Supply Voltage 5.5 V
Minimum Operating Temperature -55 °C
900 op voorraad - levertijd is 1 werkdag(en).
Prijs Each (In a Pack of 50)
0,258
(excl. BTW)
0,312
(incl. BTW)
Aantal stuks
Per stuk
Per pak*
50 - 200
€ 0,258
€ 12,90
250 +
€ 0,123
€ 6,15
*prijsindicatie
Verpakkingsopties
Related Products
Texas Instruments range of Flip-Flops and Latches from ...
Description:
Texas Instruments range of Flip-Flops and Latches from the 74LS Family of Low Power Schottky Logic ICs. The 74LS Family use bipolar junction technology coupled with Schottky diode clamps to achieve operating speeds equal to the original 74TTL family but ...
The 74HC74 and 74HCT74 are dual positive edge ...
Description:
The 74HC74 and 74HCT74 are dual positive edge triggered D-type flip-flop. They have individual data (nD), clock (nCP), set (nSD) and reset (nRD) inputs, and complementary nQ and nQ outputs. Data at the nD-input, that meets the set-up and hold ...
The 74LVC1G175 is a low-power, low-voltage single positive ...
Description:
The 74LVC1G175 is a low-power, low-voltage single positive edge triggered D-type flip-flop with individual data (D) input, clock (CP) input, master reset (MR) input, and Q output. The master reset (MR) is an asynchronous active LOW input and operates independently ...
The 74HC74D is a high speed CMOS D ...
Description:
The 74HC74D is a high speed CMOS D FLIP FLOP fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation. The signal level applied to the D ...