Renesas Electronics 9ZX21901DKLF Clock Buffer 72-Pin VFQFPN
- RS-stocknr.:
- 248-6251
- Fabrikantnummer:
- 9ZX21901DKLF
- Fabrikant:
- Renesas Electronics
Bulkkorting beschikbaar
Subtotaal (1 verpakking van 2 eenheden)*
€ 13,47
(excl. BTW)
€ 16,298
(incl. BTW)
Informatie over voorraden is momenteel niet toegankelijk - Controleer het later nog eens opnieuw
Aantal stuks | Per stuk | Per verpakking* |
|---|---|---|
| 2 - 8 | € 6,735 | € 13,47 |
| 10 - 18 | € 6,09 | € 12,18 |
| 20 - 48 | € 5,965 | € 11,93 |
| 50 + | € 5,81 | € 11,62 |
*prijsindicatie
- RS-stocknr.:
- 248-6251
- Fabrikantnummer:
- 9ZX21901DKLF
- Fabrikant:
- Renesas Electronics
Specificaties
Datasheets
Wetgeving en compliance
Productomschrijving
Zoek vergelijkbare producten door een of meer kenmerken te selecteren.
Alles selecteren | Attribuut | Waarde |
|---|---|---|
| Merk | Renesas Electronics | |
| Product Type | Clock Buffer | |
| Maximum Input Frequency | 100MHz | |
| Mount Type | Surface | |
| Package Type | VFQFPN | |
| Pin Count | 72 | |
| Minimum Supply Voltage | 3.14V | |
| Maximum Supply Voltage | 3.47V | |
| Minimum Operating Temperature | 0°C | |
| Maximum Operating Temperature | 70°C | |
| Series | 9ZX21901D | |
| Length | 10.75mm | |
| Standards/Approvals | RoHS | |
| Height | 1mm | |
| Automotive Standard | No | |
| Alles selecteren | ||
|---|---|---|
Merk Renesas Electronics | ||
Product Type Clock Buffer | ||
Maximum Input Frequency 100MHz | ||
Mount Type Surface | ||
Package Type VFQFPN | ||
Pin Count 72 | ||
Minimum Supply Voltage 3.14V | ||
Maximum Supply Voltage 3.47V | ||
Minimum Operating Temperature 0°C | ||
Maximum Operating Temperature 70°C | ||
Series 9ZX21901D | ||
Length 10.75mm | ||
Standards/Approvals RoHS | ||
Height 1mm | ||
Automotive Standard No | ||
The Renesas Electronics second generation DB1900Z differential buffer for Intel Purley and newer platforms. A fixed external feedback maintains low drift for critical QPI/UPI applications.
Fixed feedback path; 0ps input-to-output delay
9 Selectable SMBus addresses; multiple devices can share same SMBus segment
8 dedicated OE# pins; hardware control of outputs
PLL or bypass mode; PLL can dejitter incoming clock
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