Microchip DSPIC33CH128MP506-I/PT Dual 16 Bit dsPIC33CH CPU Microprocessor dsPIC33CH128MP508 FAMILY 16 bit DSP, MCU 200
- RS-stocknr.:
- 175-7216
- Fabrikantnummer:
- DSPIC33CH128MP506-I/PT
- Fabrikant:
- Microchip
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- RS-stocknr.:
- 175-7216
- Fabrikantnummer:
- DSPIC33CH128MP506-I/PT
- Fabrikant:
- Microchip
Specificaties
Datasheets
Wetgeving en compliance
Productomschrijving
Zoek vergelijkbare producten door een of meer kenmerken te selecteren.
Alles selecteren | Attribuut | Waarde |
|---|---|---|
| Merk | Microchip | |
| Series | dsPIC33CH128MP508 FAMILY | |
| Product Type | Microprocessor | |
| Device Core | Dual 16 Bit dsPIC33CH CPU | |
| Data Bus Width | 16bit | |
| Instruction Set Architecture | DSP, MCU | |
| Maximum Clock Frequency | 200MHz | |
| Mount Type | Surface | |
| Minimum Supply Voltage | 3V | |
| Package Type | TQFP | |
| Maximum Supply Voltage | 3.6V | |
| Pin Count | 64 | |
| Minimum Operating Temperature | -40°C | |
| Maximum Operating Temperature | 85°C | |
| Standards/Approvals | IEEE 1149.2 Compatible (JTAG) Boundary Scan | |
| Height | 1.2mm | |
| Width | 12 mm | |
| Length | 12mm | |
| Number of Cores | 2 | |
| Automotive Standard | No | |
| Alles selecteren | ||
|---|---|---|
Merk Microchip | ||
Series dsPIC33CH128MP508 FAMILY | ||
Product Type Microprocessor | ||
Device Core Dual 16 Bit dsPIC33CH CPU | ||
Data Bus Width 16bit | ||
Instruction Set Architecture DSP, MCU | ||
Maximum Clock Frequency 200MHz | ||
Mount Type Surface | ||
Minimum Supply Voltage 3V | ||
Package Type TQFP | ||
Maximum Supply Voltage 3.6V | ||
Pin Count 64 | ||
Minimum Operating Temperature -40°C | ||
Maximum Operating Temperature 85°C | ||
Standards/Approvals IEEE 1149.2 Compatible (JTAG) Boundary Scan | ||
Height 1.2mm | ||
Width 12 mm | ||
Length 12mm | ||
Number of Cores 2 | ||
Automotive Standard No | ||
- Land van herkomst:
- US
System developers designing high-end embedded control applications can benefit from a new Digital Signal Controller (DSC) with two dsPIC DSC cores in a single chip. The dsPIC33CH has one core that is designed to function as a master while the other is designed as a slave. The slave core is useful for executing dedicated, time-critical control code while the master core is busy running the user interface, system monitoring and communications functions, customized for the end application.
Operating Conditions
3V to 3.6V, -40°C to +125°C
Core: Dual 16-Bit dsPIC33CH CPUs
Master Core 90 MIPS and Slave Core 100 MIPS Operation
Independent Peripherals for Master Core and Slave Core
Configurable Shared Resources for Master Core and Slave Core
Programmable PLLs and Oscillator Clock Sources
Fast Wake-up and Start-up
Backup Internal Oscillator
Low-Power Management Modes (Sleep, Idle, Doze)
Integrated Power-on Reset and Brown-out Reset
Debugger Development Support
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