9FGV0241AKILFT, Clock Generator, 24-Pin VFQFPN
- RS-stocknr.:
- 216-6269
- Fabrikantnummer:
- 9FGV0241AKILFT
- Fabrikant:
- Renesas Electronics
Bulkkorting beschikbaar
Subtotaal (1 verpakking van 5 eenheden)*
€ 11,19
(excl. BTW)
€ 13,54
(incl. BTW)
GRATIS bezorging voor bestellingen van meer dan € 75,00
Op voorraad
- Plus verzending 1.150 stuk(s) vanaf 05 januari 2026
Heeft u meer nodig? Klik op 'Controleer leverdata' voor extra voorraad en levertijden.
Aantal stuks | Per stuk | Per verpakking* |
|---|---|---|
| 5 - 45 | € 2,238 | € 11,19 |
| 50 - 95 | € 1,906 | € 9,53 |
| 100 - 245 | € 1,79 | € 8,95 |
| 250 - 995 | € 1,742 | € 8,71 |
| 1000 + | € 1,702 | € 8,51 |
*prijsindicatie
- RS-stocknr.:
- 216-6269
- Fabrikantnummer:
- 9FGV0241AKILFT
- Fabrikant:
- Renesas Electronics
Specificaties
Datasheets
Wetgeving en compliance
Productomschrijving
Zoek vergelijkbare producten door een of meer kenmerken te selecteren.
Alles selecteren | Attribuut | Waarde |
|---|---|---|
| Merk | Renesas Electronics | |
| Mounting Type | Surface Mount | |
| Package Type | VFQFPN | |
| Pin Count | 24 | |
| Alles selecteren | ||
|---|---|---|
Merk Renesas Electronics | ||
Mounting Type Surface Mount | ||
Package Type VFQFPN | ||
Pin Count 24 | ||
The Renesas Electronics 9FGV0241 is a 2-output very low power frequency generator for PCIe Gen 1, 2, 3 and 4 applications with integrated output terminations providing Zo = 100. The device has 2 output enables for clock management and supports 2 different spread spectrum levels in addition to spread off.
Integrated terminations provide 100 differential Zo
reduced component count and board space
1.8V operation
reduced power consumption
OE# pins
OE# pins
support DIF power management
LP-HCSL differential clock outputs
LP-HCSL differential clock outputs
reduced power and
board space
Programmable Slew rate for each output
board space
Programmable Slew rate for each output
allows tuning
for various line lengths
Programmable output amplitude
for various line lengths
Programmable output amplitude
allows tuning for
various application environments
DIF outputs blocked until PLL is locked
various application environments
DIF outputs blocked until PLL is locked
clean system
start-up
start-up
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