onsemi Surface Shift Register HCT SOIC, 16-Pin

The MC74HCT595A consists of an 8 bit shift register and an 8 bit D-type latch with three state parallel outputs. The shift register accepts serial data and provides a serial output. The shift register also provides parallel data to the 8 bit latch. The shift register and latch have independent clock inputs. This device also has an asynchronous reset for the shift register. The HCT595A directly interfaces with the SPI serial data port on CMOS MPUs and MCUs. The device inputs are compatible with standard CMOS or LSTTL outputs.

Output Drive Capability: 15 LSTTL Loads