Nexperia 74HC238D,652, Decoder, 16-Pin SOIC
- RS-stocknr.:
- 103-5683
- Fabrikantnummer:
- 74HC238D,652
- Fabrikant:
- Nexperia
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Elk (op een haspel van 2500)
€ 0,193
(excl. BTW)
€ 0,234
(incl. BTW)
- RS-stocknr.:
- 103-5683
- Fabrikantnummer:
- 74HC238D,652
- Fabrikant:
- Nexperia
Specificaties
Datasheets
Wetgeving en compliance
Productomschrijving
Zoek vergelijkbare producten door een of meer kenmerken te selecteren.
Alles selecteren | Attribuut | Waarde |
|---|---|---|
| Merk | Nexperia | |
| Logic Family | HC | |
| Product Type | Decoder | |
| Number of Inputs | 6 | |
| Logic Function | Demultiplexer, Decoder | |
| Mount Type | Surface | |
| Package Type | SOIC | |
| Pin Count | 16 | |
| Number of Outputs | 8 | |
| Minimum Supply Voltage | 2V | |
| Maximum Supply Voltage | 6V | |
| Minimum Operating Temperature | -40°C | |
| Maximum Operating Temperature | 125°C | |
| Standards/Approvals | No | |
| Height | 2mm | |
| Width | 5.4 mm | |
| Length | 6.4mm | |
| Series | 74HC | |
| Automotive Standard | No | |
| Alles selecteren | ||
|---|---|---|
Merk Nexperia | ||
Logic Family HC | ||
Product Type Decoder | ||
Number of Inputs 6 | ||
Logic Function Demultiplexer, Decoder | ||
Mount Type Surface | ||
Package Type SOIC | ||
Pin Count 16 | ||
Number of Outputs 8 | ||
Minimum Supply Voltage 2V | ||
Maximum Supply Voltage 6V | ||
Minimum Operating Temperature -40°C | ||
Maximum Operating Temperature 125°C | ||
Standards/Approvals No | ||
Height 2mm | ||
Width 5.4 mm | ||
Length 6.4mm | ||
Series 74HC | ||
Automotive Standard No | ||
- Land van herkomst:
- TH
The 74HC238, 74HCT238 decodes three binary weighted address inputs (A0, A1 and A2) to eight mutually exclusive outputs (Y0 to Y7). The device features three enable inputs (E1 and E2 and E3). Every output will be LOW unless E1 and E2 are LOW and E3 is HIGH. This multiple enable function allows easy parallel expansion to a 1-of-32 (5 to 32 lines) decoder with just four '238 ICs and one inverter.
Multiple input enable for easy expansion or independent controls
Integrated input latch to store the address of decoder lines
Ideal for memory chip select decoding
Asynchronous and synchronous load options
Overvoltage tolerant input options
Inverting and non-inverting output options
3-stage outputs
High frequency
Can be cascaded
Key applications
Selection of memory banks and peripherals
I/O expansion
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