Infineon NOR 64 MB SPI Flash Memory 8-Pin SOIC, S25FL064LABMFI013
- RS-stocknr.:
- 215-5783
- Fabrikantnummer:
- S25FL064LABMFI013
- Fabrikant:
- Infineon
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- RS-stocknr.:
- 215-5783
- Fabrikantnummer:
- S25FL064LABMFI013
- Fabrikant:
- Infineon
Specificaties
Datasheets
Wetgeving en compliance
Productomschrijving
Zoek vergelijkbare producten door een of meer kenmerken te selecteren.
Alles selecteren | Attribuut | Waarde |
|---|---|---|
| Merk | Infineon | |
| Memory Size | 64MB | |
| Product Type | Flash Memory | |
| Interface Type | SPI | |
| Package Type | SOIC | |
| Pin Count | 8 | |
| Mount Type | Surface | |
| Maximum Clock Frequency | 108MHz | |
| Cell Type | NOR | |
| Minimum Supply Voltage | 2.7V | |
| Maximum Supply Voltage | 3.6V | |
| Minimum Operating Temperature | -40°C | |
| Maximum Operating Temperature | 85°C | |
| Length | 5.28mm | |
| Standards/Approvals | No | |
| Height | 1.9mm | |
| Number of Words | 8M | |
| Series | S25FL | |
| Automotive Standard | AEC-Q100 | |
| Maximum Random Access Time | 8ns | |
| Number of Bits per Word | 8 | |
| Alles selecteren | ||
|---|---|---|
Merk Infineon | ||
Memory Size 64MB | ||
Product Type Flash Memory | ||
Interface Type SPI | ||
Package Type SOIC | ||
Pin Count 8 | ||
Mount Type Surface | ||
Maximum Clock Frequency 108MHz | ||
Cell Type NOR | ||
Minimum Supply Voltage 2.7V | ||
Maximum Supply Voltage 3.6V | ||
Minimum Operating Temperature -40°C | ||
Maximum Operating Temperature 85°C | ||
Length 5.28mm | ||
Standards/Approvals No | ||
Height 1.9mm | ||
Number of Words 8M | ||
Series S25FL | ||
Automotive Standard AEC-Q100 | ||
Maximum Random Access Time 8ns | ||
Number of Bits per Word 8 | ||
The Cypress Semiconductor FL-L family connects to a host system via a Serial Peripheral Interface (SPI). Traditional SPI single bit serial input and output (Single I/O or SIO) is supported as well as optional two bit (Dual I/O or DIO) and four bit wide Quad I/O (QIO), and Quad Peripheral Interface (QPI) commands. In addition, there are Double Data Rate (DDR) read commands for QIO and QPI that transfer address and read data on both edges of the clock.
Serial Peripheral Interface (SPI) with Multi-I/O
Read
Program Architecture
Erase Architecture
100,000 Program-Erase Cycles, minimum
20 Year Data Retention, minimum
Security Features
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