Altera FPGA EP2C5T144I8N Cyclone II 4608 Cells, 4608 Blocks, 144-Pin TQFP
- RS-stocknr.:
- 169-5517
- Fabrikantnummer:
- EP2C5T144I8N
- Fabrikant:
- Altera
Subtotaal (1 tray van 60 eenheden)*
€ 2.060,34
(excl. BTW)
€ 2.493,00
(incl. BTW)
GRATIS bezorging voor bestellingen van meer dan € 75,00
Tijdelijk niet op voorraad
- Verzending vanaf 02 juli 2026
Heeft u meer nodig? Klik op 'Controleer leverdata' voor extra voorraad en levertijden.
Aantal stuks | Per stuk | Per tray* |
|---|---|---|
| 60 + | € 34,339 | € 2.060,34 |
*prijsindicatie
- RS-stocknr.:
- 169-5517
- Fabrikantnummer:
- EP2C5T144I8N
- Fabrikant:
- Altera
Specificaties
Datasheets
Wetgeving en compliance
Productomschrijving
Zoek vergelijkbare producten door een of meer kenmerken te selecteren.
Alles selecteren | Attribuut | Waarde |
|---|---|---|
| Merk | Altera | |
| Series | Cyclone II | |
| Product Type | FPGA | |
| Number of Logic Cells | 4608 | |
| Number of Logic Units | 4608 | |
| Number of Multipliers | 13 | |
| Mount Type | Surface | |
| Package Type | TQFP | |
| Minimum Supply Voltage | 1.15V | |
| Pin Count | 144 | |
| Maximum Supply Voltage | 1.25V | |
| Minimum Operating Temperature | -40°C | |
| Number of I/Os | 89 | |
| Maximum Operating Temperature | 100°C | |
| Width | 20 mm | |
| Height | 1.4mm | |
| Length | 20mm | |
| Standards/Approvals | No | |
| Automotive Standard | No | |
| Alles selecteren | ||
|---|---|---|
Merk Altera | ||
Series Cyclone II | ||
Product Type FPGA | ||
Number of Logic Cells 4608 | ||
Number of Logic Units 4608 | ||
Number of Multipliers 13 | ||
Mount Type Surface | ||
Package Type TQFP | ||
Minimum Supply Voltage 1.15V | ||
Pin Count 144 | ||
Maximum Supply Voltage 1.25V | ||
Minimum Operating Temperature -40°C | ||
Number of I/Os 89 | ||
Maximum Operating Temperature 100°C | ||
Width 20 mm | ||
Height 1.4mm | ||
Length 20mm | ||
Standards/Approvals No | ||
Automotive Standard No | ||
- Land van herkomst:
- MY
Cyclone FPGA, Altera
An FPGA is a semiconductor device consisting of a matrix of Configurable Logic Blocks (CLBs) connected through programmable interconnects. The user determines these interconnections by programming SRAM. A CLB can be simple (AND, OR gates, etc) or complex (a block of RAM). The FPGA allows changes to be made to a design even after the device is soldered into a PCB.
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