Toshiba 74VHC05FT CMOS Digital Integrated Circuit 6, 14-Pin TSSOP
- RS-stocknr.:
- 171-3590
- Fabrikantnummer:
- 74VHC05FT
- Fabrikant:
- Toshiba
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- RS-stocknr.:
- 171-3590
- Fabrikantnummer:
- 74VHC05FT
- Fabrikant:
- Toshiba
Specificaties
Datasheets
Wetgeving en compliance
Productomschrijving
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Alles selecteren | Attribuut | Waarde |
|---|---|---|
| Merk | Toshiba | |
| Product Type | CMOS Digital Integrated Circuit | |
| Logic Function | Inverter | |
| Input Type | CMOS | |
| Output Type | TTL | |
| Number of Elements per Chip | 6 | |
| Schmitt Trigger Input | No | |
| Maximum Propagation Delay Time @ CL | 7.5ns | |
| Maximum High Level Output Current | -8mA | |
| Maximum Low Level Output Current | 8mA | |
| Minimum Supply Voltage | 2V | |
| Mount Type | Surface | |
| Package Type | TSSOP | |
| Maximum Supply Voltage | 5.5V | |
| Minimum Operating Temperature | -40°C | |
| Pin Count | 14 | |
| Maximum Operating Temperature | 125°C | |
| Logic Family | 74VHC | |
| Length | 5mm | |
| Standards/Approvals | AEC-Q100 | |
| Width | 4.4mm | |
| Series | 74VHC | |
| Height | 1mm | |
| Automotive Standard | AEC-Q100 | |
| Alles selecteren | ||
|---|---|---|
Merk Toshiba | ||
Product Type CMOS Digital Integrated Circuit | ||
Logic Function Inverter | ||
Input Type CMOS | ||
Output Type TTL | ||
Number of Elements per Chip 6 | ||
Schmitt Trigger Input No | ||
Maximum Propagation Delay Time @ CL 7.5ns | ||
Maximum High Level Output Current -8mA | ||
Maximum Low Level Output Current 8mA | ||
Minimum Supply Voltage 2V | ||
Mount Type Surface | ||
Package Type TSSOP | ||
Maximum Supply Voltage 5.5V | ||
Minimum Operating Temperature -40°C | ||
Pin Count 14 | ||
Maximum Operating Temperature 125°C | ||
Logic Family 74VHC | ||
Length 5mm | ||
Standards/Approvals AEC-Q100 | ||
Width 4.4mm | ||
Series 74VHC | ||
Height 1mm | ||
Automotive Standard AEC-Q100 | ||
The 74VHC05FT is an advanced high speed CMOS INVERTER fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. The internal circuit is composed of 3 stages including buffer output, which provide high noise immunity and stable output. An input protection circuit ensures that 0 to 5.5 V can be applied to the input pins without regard to the supply voltage. This device can be used to interface 5 V to 3 V systems and two supply systems such as battery back up. This circuit prevents device destruction due to mismatched supply and input voltages.
Wide operating temperature: Topr = -40 to 125
High speed: Propagation delay time = 3.8 ns (typ.) at VCC = 5.0 V
Low power dissipation: ICC = 2.0 μA (max) at Ta = 25
High noise immunity: VNIH = VNIL = 28 % VCC (min)
Power-down protection is provided on all inputs.
Balanced propagation delays: tPLH ≈ tPHL
Wide operating voltage range: VCC(opr) = 2.0 to 5.5 V
Low noise: V = 0.8 V (max)
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