Renesas Electronics 2305-1DCGI8 Clock Buffer 8-Pin TSSOP
- RS-stocknr.:
- 235-8694
- Fabrikantnummer:
- 2305-1DCGI8
- Fabrikant:
- Renesas Electronics
Subtotaal (1 rol van 3000 eenheden)*
€ 1.944,00
(excl. BTW)
€ 2.352,00
(incl. BTW)
Voeg 3000 eenheden toe voor gratis bezorging
Tijdelijk niet op voorraad
- Verzending vanaf 21 mei 2026
Heeft u meer nodig? Klik op 'Controleer leverdata' voor extra voorraad en levertijden.
Aantal stuks | Per stuk | Per rol* |
|---|---|---|
| 3000 + | € 0,648 | € 1.944,00 |
*prijsindicatie
- RS-stocknr.:
- 235-8694
- Fabrikantnummer:
- 2305-1DCGI8
- Fabrikant:
- Renesas Electronics
Specificaties
Datasheets
Wetgeving en compliance
Productomschrijving
Zoek vergelijkbare producten door een of meer kenmerken te selecteren.
Alles selecteren | Attribuut | Waarde |
|---|---|---|
| Merk | Renesas Electronics | |
| Product Type | Clock Buffer | |
| Maximum Input Frequency | 133MHz | |
| Mount Type | Surface | |
| Maximum Propagation Delay Time | 350ps | |
| Package Type | TSSOP | |
| Pin Count | 8 | |
| Number of Outputs | 5 | |
| Minimum Supply Voltage | 3V | |
| Maximum Supply Voltage | 3.6V | |
| Minimum Operating Temperature | -40°C | |
| Maximum Operating Temperature | 85°C | |
| Width | 3.9 mm | |
| Series | IDT2305 Unitless | |
| Standards/Approvals | No | |
| Height | 1.5mm | |
| Length | 4.9mm | |
| Automotive Standard | No | |
| Alles selecteren | ||
|---|---|---|
Merk Renesas Electronics | ||
Product Type Clock Buffer | ||
Maximum Input Frequency 133MHz | ||
Mount Type Surface | ||
Maximum Propagation Delay Time 350ps | ||
Package Type TSSOP | ||
Pin Count 8 | ||
Number of Outputs 5 | ||
Minimum Supply Voltage 3V | ||
Maximum Supply Voltage 3.6V | ||
Minimum Operating Temperature -40°C | ||
Maximum Operating Temperature 85°C | ||
Width 3.9 mm | ||
Series IDT2305 Unitless | ||
Standards/Approvals No | ||
Height 1.5mm | ||
Length 4.9mm | ||
Automotive Standard No | ||
The Renesas Electronics high speed phase lock loop clock buffer, designed to address high speed clock distribution applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz.The IDT2305 is an eight pin version of the IDT2309. IDT2305 accepts one reference input, and drives out five low skew clocks.
Phase lock loop clock distribution
Distributes one clock input to one bank of five outputs
Zero input output delay
No external rc network required
Available in soic and tssop packages
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