Renesas Electronics 2309-1HPGG Clock Buffer 16-Pin TSSOP
- RS-stocknr.:
- 263-7880
- Fabrikantnummer:
- 2309-1HPGG
- Fabrikant:
- Renesas Electronics
Bulkkorting beschikbaar
Subtotaal (1 verpakking van 5 eenheden)*
€ 5,80
(excl. BTW)
€ 7,00
(incl. BTW)
Voeg 80 eenheden toe voor gratis bezorging
Op voorraad
- Plus verzending 565 stuk(s) vanaf 19 februari 2026
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Aantal stuks | Per stuk | Per verpakking* |
|---|---|---|
| 5 - 5 | € 1,16 | € 5,80 |
| 10 - 20 | € 1,044 | € 5,22 |
| 25 - 45 | € 0,976 | € 4,88 |
| 50 - 90 | € 0,958 | € 4,79 |
| 95 + | € 0,936 | € 4,68 |
*prijsindicatie
- RS-stocknr.:
- 263-7880
- Fabrikantnummer:
- 2309-1HPGG
- Fabrikant:
- Renesas Electronics
Specificaties
Datasheets
Wetgeving en compliance
Productomschrijving
Zoek vergelijkbare producten door een of meer kenmerken te selecteren.
Alles selecteren | Attribuut | Waarde |
|---|---|---|
| Merk | Renesas Electronics | |
| Product Type | Clock Buffer | |
| Maximum Input Frequency | 133MHz | |
| Mount Type | Surface | |
| Package Type | TSSOP | |
| Pin Count | 16 | |
| Number of Outputs | 15 | |
| Minimum Supply Voltage | -0.5V | |
| Maximum Supply Voltage | 4.6V | |
| Minimum Operating Temperature | 0°C | |
| Maximum Operating Temperature | 70°C | |
| Standards/Approvals | RoHS | |
| Height | 1mm | |
| Width | 4.4 mm | |
| Series | IDT2309 | |
| Length | 5mm | |
| Automotive Standard | No | |
| Alles selecteren | ||
|---|---|---|
Merk Renesas Electronics | ||
Product Type Clock Buffer | ||
Maximum Input Frequency 133MHz | ||
Mount Type Surface | ||
Package Type TSSOP | ||
Pin Count 16 | ||
Number of Outputs 15 | ||
Minimum Supply Voltage -0.5V | ||
Maximum Supply Voltage 4.6V | ||
Minimum Operating Temperature 0°C | ||
Maximum Operating Temperature 70°C | ||
Standards/Approvals RoHS | ||
Height 1mm | ||
Width 4.4 mm | ||
Series IDT2309 | ||
Length 5mm | ||
Automotive Standard No | ||
The Renesas Electronics high-speed phase-lock loop clock buffer, designed to address high-speed clock distribution applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz. It is an 8-pin version of the accepts one reference input, and drives out five low skew clocks.
Phase lock loop clock distribution
Distributes one clock input to one bank of five outputs
No external RC network required
Power down mode
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