Nexperia 74LVC574APW,118 8 Flip Flop IC 74LVC, 3 State, 20-Pin TSSOP
- RS-stocknr.:
- 170-8029
- Fabrikantnummer:
- 74LVC574APW,118
- Fabrikant:
- Nexperia
Subtotaal (1 rol van 2500 eenheden)*
€ 482,50
(excl. BTW)
€ 585,00
(incl. BTW)
GRATIS bezorging voor bestellingen van meer dan € 90,00
Tijdelijk niet op voorraad
- Verzending vanaf 11 maart 2027
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Aantal stuks | Per stuk | Per rol* |
|---|---|---|
| 2500 + | € 0,193 | € 482,50 |
*prijsindicatie
- RS-stocknr.:
- 170-8029
- Fabrikantnummer:
- 74LVC574APW,118
- Fabrikant:
- Nexperia
Specificaties
Datasheets
Wetgeving en compliance
Productomschrijving
Zoek vergelijkbare producten door een of meer kenmerken te selecteren.
Alles selecteren | Attribuut | Waarde |
|---|---|---|
| Merk | Nexperia | |
| Product Type | Flip Flop IC | |
| Logic Family | 74LVC | |
| Input Type | Single Ended | |
| Output Type | 3 State | |
| Mount Type | Surface | |
| Package Type | TSSOP | |
| Minimum Supply Voltage | 1.2V | |
| Maximum Supply Voltage | 3.6V | |
| Pin Count | 20 | |
| Trigger Type | Positive Edge | |
| Minimum Operating Temperature | -40°C | |
| Maximum Operating Temperature | 125°C | |
| Number of Elements per Chip | 8 | |
| Length | 6.6mm | |
| Height | 0.95mm | |
| Width | 4.5mm | |
| Alles selecteren | ||
|---|---|---|
Merk Nexperia | ||
Product Type Flip Flop IC | ||
Logic Family 74LVC | ||
Input Type Single Ended | ||
Output Type 3 State | ||
Mount Type Surface | ||
Package Type TSSOP | ||
Minimum Supply Voltage 1.2V | ||
Maximum Supply Voltage 3.6V | ||
Pin Count 20 | ||
Trigger Type Positive Edge | ||
Minimum Operating Temperature -40°C | ||
Maximum Operating Temperature 125°C | ||
Number of Elements per Chip 8 | ||
Length 6.6mm | ||
Height 0.95mm | ||
Width 4.5mm | ||
The 74LVC574A is an octal D-type flip-flop featuring separate D-type inputs for each flip-flop and 3-state outputs for bus-oriented applications. A clock (CP) and an Output Enable (OE) input are common to all flip-flops. The eight flip-flops will store the state of their individual D-inputs that meet the set-up and hold times requirements on the LOW to HIGH CP transition. When OE is LOW, the contents of the eight flip-flops are available at the outputs. When OE is HIGH, the outputs go to the high-impedance OFF-state. Operation of the OE input does not affect the state of the flip-flops.
Mixed 5 V and 3.3 V applications
Improved signal integrity with integrated termination resistors
High noise immunity
Flow through pin out for easy layout
Wide supply voltage range
Low propagation delay
Overvoltage tolerant input options
Integrated source termination resistor options
Bus hold options