Toshiba 74HC21D, 2 4-Input AND, AND Logic Gate, 14-Pin SOIC
- RS-stocknr.:
- 171-3385
- Fabrikantnummer:
- 74HC21D
- Fabrikant:
- Toshiba
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We weten niet of dit item nog op voorraad komt, RS is van plan dit binnenkort uit ons assortiment te halen.
- RS-stocknr.:
- 171-3385
- Fabrikantnummer:
- 74HC21D
- Fabrikant:
- Toshiba
Specificaties
Datasheets
Wetgeving en compliance
Productomschrijving
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Alles selecteren | Attribuut | Waarde |
|---|---|---|
| Merk | Toshiba | |
| Product Type | Logic Gate | |
| Logic Function | AND, AND | |
| Mount Type | Surface, Surface Mount | |
| Number of Elements | 2 | |
| Number of Inputs per Gate | 4 | |
| Schmitt Trigger Input | No | |
| Package Type | SOIC | |
| Pin Count | 14 | |
| Logic Family | 74HC | |
| Input Type | CMOS | |
| Maximum Propagation Delay Time @ CL | 25ns | |
| Minimum Operating Temperature | -40°C | |
| Maximum High Level Output Current | -5.2mA | |
| Maximum Operating Temperature | 85°C | |
| Height | 1.38mm | |
| Minimum Supply Voltage | 2V | |
| Maximum Supply Voltage | 6V | |
| Series | 74HC | |
| Standards/Approvals | No | |
| Length | 8.95mm | |
| Maximum Low Level Output Current | 5.2mA | |
| Automotive Standard | No | |
| Output Type | Buffer, Buffer, CMOS, CMOS | |
| Alles selecteren | ||
|---|---|---|
Merk Toshiba | ||
Product Type Logic Gate | ||
Logic Function AND, AND | ||
Mount Type Surface, Surface Mount | ||
Number of Elements 2 | ||
Number of Inputs per Gate 4 | ||
Schmitt Trigger Input No | ||
Package Type SOIC | ||
Pin Count 14 | ||
Logic Family 74HC | ||
Input Type CMOS | ||
Maximum Propagation Delay Time @ CL 25ns | ||
Minimum Operating Temperature -40°C | ||
Maximum High Level Output Current -5.2mA | ||
Maximum Operating Temperature 85°C | ||
Height 1.38mm | ||
Minimum Supply Voltage 2V | ||
Maximum Supply Voltage 6V | ||
Series 74HC | ||
Standards/Approvals No | ||
Length 8.95mm | ||
Maximum Low Level Output Current 5.2mA | ||
Automotive Standard No | ||
Output Type Buffer, Buffer, CMOS, CMOS | ||
The 74HC21D is a high speed CMOS 4-INPUT AND GATE fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation. The internal circuit is composed of 4 stages including buffer an output, which provide high noise immunity and stable output. All inputs are equipped with protection circuits against static discharge or transient excess voltage
High speed: tpd = 10 ns (typ.) at VCC = 5 V
Low power dissipation: ICC = 1.0 μA (max) Ta = 25
Balanced propagation delays: tPLH ≈ tPHL
Wide operating voltage range: VCC(opr) = 2.0 to 6.0 V