Infineon C7 GOLD Type N-Channel MOSFET & Diode, 83 A, 650 V Enhancement, 10-Pin HDSOP IPDD60R080G7XTMA1

Bulkkorting beschikbaar

Subtotaal (1 verpakking van 2 eenheden)*

€ 8,88

(excl. BTW)

€ 10,74

(incl. BTW)

Add to Basket
selecteer of typ hoeveelheid
Op voorraad
  • Plus verzending 1.700 stuk(s) vanaf 29 december 2025
Heeft u meer nodig? Klik op 'Controleer leverdata' voor extra voorraad en levertijden.
Aantal stuks
Per stuk
Per verpakking*
2 - 8€ 4,44€ 8,88
10 - 18€ 4,04€ 8,08
20 - 48€ 3,77€ 7,54
50 - 98€ 3,50€ 7,00
100 +€ 3,24€ 6,48

*prijsindicatie

Verpakkingsopties
RS-stocknr.:
220-7418
Fabrikantnummer:
IPDD60R080G7XTMA1
Fabrikant:
Infineon
Zoek vergelijkbare producten door een of meer kenmerken te selecteren.
Alles selecteren

Merk

Infineon

Product Type

MOSFET & Diode

Channel Type

Type N

Maximum Continuous Drain Current Id

83A

Maximum Drain Source Voltage Vds

650V

Series

C7 GOLD

Package Type

HDSOP

Mount Type

Surface

Pin Count

10

Maximum Drain Source Resistance Rds

80mΩ

Channel Mode

Enhancement

Maximum Gate Source Voltage Vgs

20 V

Maximum Power Dissipation Pd

174W

Typical Gate Charge Qg @ Vgs

42nC

Forward Voltage Vf

0.8V

Length

6.6mm

Standards/Approvals

No

Height

21.11mm

Width

2.35 mm

Automotive Standard

No

The Infineon technologies introduces Double DPAK (DDPAK), the first top-side cooled surface mount device (SMD) package addressing high power SMPS applications such as PC power, solar, server and telecom. The benefits of the already existing high voltage technology 600V Cool MOS G7 super junction (SJ) MOSFETis combined with the innovative concept of top-side cooling, providing a system solution for high current hard switching topologies such as PFC and a high-end efficiency solution for LLC topologies.

Gives best-in-class FOM RDS(on) x Eoss and RDS(on) x Qg

Innovative top-side cooling concept

Inbuilt 4th pin Kelvin source configuration and low parasitic source inductance

TCOB capability of >> 2.000 cycles, MSL1 compliant and total Pb-free

Enabling highest energy efficiency

Thermal decoupling of board and semiconductor allows to overcome thermal PCB limits

Reduced parasitic source inductance improves e efficiency and ease-of-use

Enables higher power density solutions

Exceeding the highest quality standards

Gerelateerde Links