Infineon 1Mbit 25ns NVRAM, 16-Pin SOIC, CY14V101Q3-SFXI
- RS-stocknr.:
- 194-9093
- Fabrikantnummer:
- CY14V101Q3-SFXI
- Fabrikant:
- Infineon
Informatie over voorraden is momenteel niet toegankelijk
- RS-stocknr.:
- 194-9093
- Fabrikantnummer:
- CY14V101Q3-SFXI
- Fabrikant:
- Infineon
Specificaties
Datasheets
Wetgeving en compliance
Productomschrijving
Zoek vergelijkbare producten door een of meer kenmerken te selecteren.
Alles selecteren | Attribuut | Waarde |
|---|---|---|
| Merk | Infineon | |
| Memory Size | 1Mbit | |
| Organisation | 128K x 8 bit | |
| Interface Type | SPI | |
| Data Bus Width | 8bit | |
| Maximum Random Access Time | 25ns | |
| Mounting Type | Surface Mount | |
| Package Type | SOIC | |
| Pin Count | 16 | |
| Dimensions | 10.49 x 7.59 x 2.36mm | |
| Length | 10.49mm | |
| Width | 7.59mm | |
| Height | 2.36mm | |
| Maximum Operating Supply Voltage | 3.6 V | |
| Maximum Operating Temperature | +85 °C | |
| Minimum Operating Supply Voltage | 3 V | |
| Number of Bits per Word | 8bit | |
| Minimum Operating Temperature | -40 °C | |
| Number of Words | 128K | |
| Alles selecteren | ||
|---|---|---|
Merk Infineon | ||
Memory Size 1Mbit | ||
Organisation 128K x 8 bit | ||
Interface Type SPI | ||
Data Bus Width 8bit | ||
Maximum Random Access Time 25ns | ||
Mounting Type Surface Mount | ||
Package Type SOIC | ||
Pin Count 16 | ||
Dimensions 10.49 x 7.59 x 2.36mm | ||
Length 10.49mm | ||
Width 7.59mm | ||
Height 2.36mm | ||
Maximum Operating Supply Voltage 3.6 V | ||
Maximum Operating Temperature +85 °C | ||
Minimum Operating Supply Voltage 3 V | ||
Number of Bits per Word 8bit | ||
Minimum Operating Temperature -40 °C | ||
Number of Words 128K | ||
The Cypress CY14V101Q3 combines a 1 Mbit nvSRAM with a nonvolatile element in each memory cell with serial SPI interface. The memory is organized as 128 K words of 8 bits each. The embedded nonvolatile elements incorporate the QuantumTrap technology, creating reliable nonvolatile memory. The SRAM provides infinite read and write cycles, while the QuantumTrap cell provides highly reliable nonvolatile storage of data. Data transfers from SRAM to the nonvolatile elements (STORE operation) takes place automatically at power-down. On power-up, data is restored to the SRAM from the nonvolatile memory (RECALL operation). Both STORE and RECALL operations can also be initiated by the user through SPI Instruction.
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