Alliance Memory AS4C512M16D3LC-12BIN SDRAM 8 GB Through Hole, 96-Pin 16 bit FBGA-96 Ball
- RS-stocknr.:
- 665-414
- Fabrikantnummer:
- AS4C512M16D3LC-12BIN
- Fabrikant:
- Alliance Memory
Subtotaal (1 eenheid)*
€ 25,79
(excl. BTW)
€ 31,21
(incl. BTW)
GRATIS bezorging voor bestellingen van meer dan € 75,00
Op voorraad
- 98 stuk(s) klaar voor verzending vanaf een andere locatie
Heeft u meer nodig? Klik op 'Controleer leverdata' voor extra voorraad en levertijden.
Aantal stuks | Per stuk |
|---|---|
| 1 + | € 25,79 |
*prijsindicatie
- RS-stocknr.:
- 665-414
- Fabrikantnummer:
- AS4C512M16D3LC-12BIN
- Fabrikant:
- Alliance Memory
Specificaties
Datasheets
Wetgeving en compliance
Productomschrijving
Zoek vergelijkbare producten door een of meer kenmerken te selecteren.
Alles selecteren | Attribuut | Waarde |
|---|---|---|
| Merk | Alliance Memory | |
| Product Type | SDRAM | |
| Memory Size | 8GB | |
| Organisation | 512M x 16 | |
| Data Bus Width | 16bit | |
| Mount Type | Through Hole | |
| Package Type | FBGA-96 Ball | |
| Pin Count | 96 | |
| Standards/Approvals | JEDEC, RoHS | |
| Automotive Standard | No | |
| Alles selecteren | ||
|---|---|---|
Merk Alliance Memory | ||
Product Type SDRAM | ||
Memory Size 8GB | ||
Organisation 512M x 16 | ||
Data Bus Width 16bit | ||
Mount Type Through Hole | ||
Package Type FBGA-96 Ball | ||
Pin Count 96 | ||
Standards/Approvals JEDEC, RoHS | ||
Automotive Standard No | ||
- Land van herkomst:
- TW
The Alliance Memory Synchronous DRAM is based on a double data rate architecture to achieve high-speed operation and is internally configured as eight banks. The 8Gb Twin Die DDR3L DRAM uses two 4Gb DDR3L x8 dies combined into a 2-byte x16 device in one package. It is organized as 64Mbit x 16 I/Os across 8 banks and supports double data rate transfer speeds up to 1866 Mb/sec per pin for general applications. The design complies with DDR3L standards, with all control and address inputs synchronized to a pair of externally supplied differential clocks.
Fully synchronous operation
8 internal banks for concurrent operation
Pipelined internal architecture
Precharge and active power down
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