Winbond SDRAM 512 MB Surface, 84-Pin 16 bit VFBGA
- RS-stocknr.:
- 242-0780
- Fabrikantnummer:
- W9751G6NB25I
- Fabrikant:
- Winbond
Momenteel niet beschikbaar
We weten niet of dit item nog op voorraad komt, RS is van plan dit binnenkort uit ons assortiment te halen.
- RS-stocknr.:
- 242-0780
- Fabrikantnummer:
- W9751G6NB25I
- Fabrikant:
- Winbond
Specificaties
Datasheets
Wetgeving en compliance
Productomschrijving
Zoek vergelijkbare producten door een of meer kenmerken te selecteren.
Alles selecteren | Attribuut | Waarde |
|---|---|---|
| Merk | Winbond | |
| Product Type | SDRAM | |
| Memory Size | 512MB | |
| Organisation | 32M x 16 | |
| Data Bus Width | 16bit | |
| Address Bus Width | 15bit | |
| Number of Bits per Word | 16 | |
| Maximum Random Access Time | 0.4ns | |
| Number of Words | 32M | |
| Mount Type | Surface | |
| Package Type | VFBGA | |
| Minimum Operating Temperature | -40°C | |
| Pin Count | 84 | |
| Maximum Operating Temperature | 95°C | |
| Standards/Approvals | RoHS | |
| Width | 8 mm | |
| Height | 0.6mm | |
| Series | W9751G6NB | |
| Length | 12.5mm | |
| Maximum Supply Voltage | 1.9V | |
| Minimum Supply Voltage | 1.7V | |
| Automotive Standard | No | |
| Alles selecteren | ||
|---|---|---|
Merk Winbond | ||
Product Type SDRAM | ||
Memory Size 512MB | ||
Organisation 32M x 16 | ||
Data Bus Width 16bit | ||
Address Bus Width 15bit | ||
Number of Bits per Word 16 | ||
Maximum Random Access Time 0.4ns | ||
Number of Words 32M | ||
Mount Type Surface | ||
Package Type VFBGA | ||
Minimum Operating Temperature -40°C | ||
Pin Count 84 | ||
Maximum Operating Temperature 95°C | ||
Standards/Approvals RoHS | ||
Width 8 mm | ||
Height 0.6mm | ||
Series W9751G6NB | ||
Length 12.5mm | ||
Maximum Supply Voltage 1.9V | ||
Minimum Supply Voltage 1.7V | ||
Automotive Standard No | ||
The Winbond SDRAM is a 512M bits DDR2 SDRAM which is organized as 8,388,608 words, 4 banks, 16 bits. This device achieves high speed transfer rates for various applications.
Two data transfers per clock cycle
Edge-aligned with read data and centre-aligned with write data
DLL aligns DQ and DQS transitions with clock
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